CiREX Experiment
Component Indexer Board 0 IDX0
Indexer Interface
Connector IDX0:J1 SE-80
Cable P2

Connected via cable P2 to DP, connector J2

  Pin    Signal                               Link To          Follow
  1      gnd(DIG)                             J1.10            ==>
  2      STEP_LM(DP) @ 0x008                                   ==>
  3      +5v(DP)                              J1.32            ==>
  4      DIR_LM(DP) @ 0x002                                    ==>
  5      ENABLE_LM @ 0x003                                     ==>
  6      +5v(DP)                              J1.69            ==>
  7      ~INLIMIT_LM @ 0x000                                   ==>
  8      gnd(DIG)                             J1.80            ==>
  9      ~OUTLIMIT_LM @ 0x001                                  ==>
  10     gnd(DIG)                             J1.14            ==>
  11     ZEROREF_LM @ 0x006                                    ==>
  12     KILL_A_LM @ 0x004                                     ==>
  13     KILL_B_LM @ 0x005                                     ==>
  14     gnd(DIG)                             J1.21            ==>
  15     STEP_SM(DP) @ 0x018                                   ==>
  16     +5v(DP)                              J1.19            ==>
  17     DIR_SM(DP) @ 0x012                                    ==>
  18     ENABLE_SM @ 0x013                                     ==>
  19     +5v(DP)                              J1.29            ==>
  20     ~INLIMIT_SM @ 0x010                                   ==>
  21     gnd(DIG)                             J1.23            ==>
  22     ~OUTLIMIT_SM @ 0x011                                  ==>
  23     gnd(DIG)                             J1.27            ==>
  24     ZEROREF_SM @ 0x016                                    ==>
  25     KILL_A_SM @ 0x014                                     ==>
  26     KILL_B_SM @ 0x015                                     ==>
  27     gnd(DIG)                             J1.34            ==>
  28     STEP_STD @ 0x028                                      ==>
  29     +5v(DP)                              J1.3             ==>
  30     DIR_STD @ 0x022                                       ==>
  31     ENABLE_STD @ 0x023                                    ==>
  32     +5v(DP)                              J1.43            ==>
  33     ~INLIMIT_STD @ 0x020                                  ==>
  34     gnd(DIG)                             J1.36            ==>
  35     ~OUTLIMIT_STD @ 0x021                                 ==>
  36     gnd(DIG)                             J1.40            ==>
  37     ZEROREF_STD @ 0x026                                   ==>
  38     KILL_A_STD @ 0x024                                    ==>
  39     KILL_B_STD @ 0x025                                    ==>
  40     gnd(DIG)                             J1.41            ==>
  41     gnd(DIG)                             J1.48            ==>
  42     STEP_ZD @ 0x038                                       ==>
  43     +5v(DP)                              J1.46            ==>
  44     DIR_ZD @ 0x032                                        ==>
  45     ENABLE_ZD @ 0x033                                     ==>
  46     +5v(DP)                              J1.56            ==>
  47     ~INLIMIT_ZD @ 0x030                                   ==>
  48     gnd(DIG)                             J1.50            ==>
  49     ~OUTLIMIT_ZD @ 0x031                                  ==>
  50     gnd(DIG)                             J1.54            ==>
  51     ZEROREF_ZD @ 0x036                                    ==>
  52     KILL_A_ZD @ 0x034                                     ==>
  53     KILL_B_ZD @ 0x035                                     ==>
  54     gnd(DIG)                             J1.61            ==>
  55     STEP_CBB @ 0x048                                      ==>
  56     +5v(DP)                              J1.59            ==>
  57     DIR_CBB @ 0x042                                       ==>
  58     ENABLE_CBB @ 0x043                                    ==>
  59     +5v(DP)                              J1.6             ==>
  60     ~INLIMIT_CBB @ 0x040                                  ==>
  61     gnd(DIG)                             J1.63            ==>
  62     ~OUTLIMIT_CBB @ 0x041                                 ==>
  63     gnd(DIG)                             J1.67            ==>
  64     ZEROREF_CBB @ 0x046                                   ==>
  65     KILL_A_CBB @ 0x044                                    ==>
  66     KILL_B_CBB @ 0x045                                    ==>
  67     gnd(DIG)                             J1.74            ==>
  68     STEP_PM(DP) @ 0x058                                   ==>
  69     +5v(DP)                              J1.72            ==>
  70     DIR_PM(DP) @ 0x052                                    ==>
  71     ENABLE_PM @ 0x053                                     ==>
  72     +5v(DP)                              JSB.17           ==>
  73     ~INLIMIT_PM @ 0x050                                   ==>
  74     gnd(DIG)                             J1.76            ==>
  75     ~OUTLIMIT_PM @ 0x051                                  ==>
  76     gnd(DIG)                             J1.8             ==>
  77     ZEROREF_PM @ 0x056                                    ==>
  78     KILL_A_PM @ 0x054                                     ==>
  79     KILL_B_PM @ 0x055                                     ==>
  80     gnd(DIG)                             JSB.45           ==>
[IDX0] [Systems] [Cables] [Signals]

Connector pin assignments by Terry Allen.
Web listings compiled by Norton T. Allen February 3, 1998.

(c)1998 Harvard University Atmospheric Research Project