LIMITS.2 State Machine Tables
This is the truth table associated with the state machine implemented
in the circuit on the schematic LIMITS.2.
Inputs:
A = ARMZERO
Z = ZEROREF (Qualified)
State Variables:
B = Zero Armed
R = RESETPOS
A Z B R B R
---------+-----
0 0 0 0 | 0 0 B B 0 0 1 1
0 0 0 1 | 0 0 R 0 1 1 0
0 0 1 0 | 1 0 AZ +-------- _ __
0 0 1 1 | 0 0 00 | 0 0 0 1 AR+ZRB
0 1 0 0 | 0 0 01 | 0 0 0 0
0 1 0 1 | 0 0 11 | 1 0 0 1
0 1 1 0 | 0 1 10 | 1 0 0 1
0 1 1 1 | 0 0
1 0 0 0 | 1 0
1 0 0 1 | 0 0 Z B 0 0 1 1
1 0 1 0 | 1 0 R 0 1 1 0
1 0 1 1 | 0 0 AZ +-------- _ _
1 1 0 0 | 1 0 00 | 0 0 0 0 AZBR
1 1 0 1 | 0 0 01 | 0 0 0 1
1 1 1 0 | 1 0 11 | 0 0 0 0
1 1 1 1 | 0 0 10 | 0 0 0 0