| version 1.23 | | version 1.24 |
|---|
| | |
| TM typedef double VOLTS { text "%5.3lf"; } | | TM typedef double VOLTS { text "%5.3lf"; } |
| TM typedef double KELVIN { text "%5.1lf"; } | | TM typedef double KELVIN { text "%5.1lf"; } |
| TM typedef double TOR1 { text "%5.1lf"; } | | TM typedef double TORR { text "%5.1lf"; } |
| TM typedef double TOR2 { text "%5.1lf"; } | | |
| TM typedef double CELCIUS { text "%5.1lf"; } | | TM typedef double CELCIUS { text "%5.1lf"; } |
| TM typedef double AMPS { text "%4.1lf"; } | | TM typedef double AMPS { text "%4.1lf"; } |
| | | |
| | |
| convert VOLTS; | | convert VOLTS; |
| } | | } |
| TM typedef AD12 AD12_TORR1 { | | TM typedef AD12 AD12_TORR1 { |
| convert TOR1; | | convert TORR; |
| text "%6.1lf"; | | text "%6.1lf"; |
| } | | } |
| TM typedef AD12 AD12_TORR2 { | | TM typedef AD12 AD12_TORR2 { |
| convert TOR2; | | convert TORR; |
| text "%6.2lf"; | | text "%6.2lf"; |
| } | | } |
| TM typedef AD12 AD12_T10K { | | TM typedef AD12 AD12_T10K { |
| | |
| 0, 0, | | 0, 0, |
| 4096, 4.096 | | 4096, 4.096 |
| } | | } |
| Calibration ( AD12_TORR1, TOR1 ) { | | Calibration ( AD12_TORR1, TORR ) { |
| 0, 0, | | 0, 0, |
| 4096, 1000 | | 4096, 1000 |
| } | | } |
| Calibration ( AD12_TORR2, TOR2 ) { | | Calibration ( AD12_TORR2, TORR ) { |
| 0, 0, | | 0, 0, |
| 4096, 100 | | 4096, 100 |
| } | | } |
| | |
| } | | } |
| TM typedef UCHAR SWUCHAR { collect x = cache_read( x.address ); } | | TM typedef UCHAR SWUCHAR { collect x = cache_read( x.address ); } |
| | | |
| TM typedef unsigned int UINT { text "%5u"; } | | TM typedef unsigned short UINT { text "%5u"; } |
| TM typedef unsigned int INTDA { text "%4u"; } | | TM typedef unsigned short INTDA { text "%4u"; } |
| TM typedef UINT DASPt { | | TM typedef UINT DASPt { |
| text "%4u"; | | text "%4u"; |
| collect x = cache_read( x.address ); | | collect x = cache_read( x.address ); |
| | |
| TM 1 Hz AD12 SDTDP; Address SDTDP 0xC94; | | TM 1 Hz AD12 SDTDP; Address SDTDP 0xC94; |
| TM 1 Hz AD12_TORR1 SD_HP; Address SD_HP 0xC90; | | TM 1 Hz AD12_TORR1 SD_HP; Address SD_HP 0xC90; |
| TM 1 Hz AD12_TORR2 SD_LP; Address SD_LP 0xC96; | | TM 1 Hz AD12_TORR2 SD_LP; Address SD_LP 0xC96; |
| | | TM 1 Hz AD12_10 PDPDP; Address PDPDP 0xC5C; |
| | | TM 1 Hz AD12_T30K PDP_T; Address PDP_T 0xC5E; |
| | | TM 1 Hz AD12_TORR1 PD_HP; Address PD_HP 0xCD4; |
| | | TM 1 Hz AD12_TORR2 PD_LP; Address PD_LP 0xCD6; |
| TM 1 Hz AD12 SVPos; Address SVPos 0xC9A; | | TM 1 Hz AD12 SVPos; Address SVPos 0xC9A; |
| /* TM 1 Hz AD12_T30K TAFB1; Address TAFB1 0xCA2; */ | | /* TM 1 Hz AD12_T30K TAFB1; Address TAFB1 0xCA2; */ |
| /* TM 1 Hz AD12_T30K TAFB2; Address TAFB2 0xCA4; */ | | /* TM 1 Hz AD12_T30K TAFB2; Address TAFB2 0xCA4; */ |