| version 1.8 | | version 1.9 |
|---|
| | |
| %{ | | %{ |
| | | #define IOMODE_INIT (IO_SPACE|IO_BACKSPACE|IO_WORD|IO_WORDSKIP) |
| | | |
| #ifdef SERVER | | #ifdef SERVER |
| #include <i86.h> | | #include <math.h> |
| #include "address.h" | | #include "analogic.h" |
| #include "da_cache.h" | | #include "qcliclt.h" |
| | | |
| | | #define RINGFIT (ANLG_OPT_A|ANLG_OPT_FIT) |
| | | Server_Def *cpci14; |
| | | /* FSam, NSam, NRep, NAvg, NCoadd, FTrigger, Options */ |
| | | analogic_setup_t cpci14setup; |
| | | /* RgDn 50Hz 10000000, 400, 80, 1, 50, 4000, RINGFIT */ |
| | | /* RgDn 10Hz 10000000, 500, 80, 1, 10, 800, RINGFIT */ |
| | | /* ICOS 50Hz 625000, 10000, 2000, 0, 50, 50, ANLG_OPT_A|ANLG_OPT_B */ |
| | | /* ICOS 10HZ 625000, 50000, 2000, 0, 10, 10, ANLG_OPT_A|ANLG_OPT_B */ |
| | | |
| | | /* This initialization is called from CRsrvr.oui */ |
| | | void cpci_def_init( void ) { |
| | | cpci14 = cpci_init( "cpci14" ); |
| | | qcli_addr_init( 0 ); /* Use HSDA interface on board 0 */ |
| | | if ( !qcli_diags( 0 ) ) |
| | | nl_error( 2, "QCLI Diagnostics Failed" ); |
| | | } |
| | | |
| #include "subbus.h" | | #include "subbus.h" |
| | | |
| void scdc( int cmd ) { | | void scdc( int cmd ) { |
| | |
| send_dascmd( DCT_SCDC, cmd, 0 ); | | send_dascmd( DCT_SCDC, cmd, 0 ); |
| #endif | | #endif |
| } | | } |
| | | |
| /* static int qcli_mode = 0, qcli_on = 0; */ | | |
| static int qcli_icos = 0; | | |
| static int qcli_10Hz = 0; | | |
| static unsigned short qcli_ramp = 0, qcli_offset = 0; | | |
| static unsigned short qcli_low = 0, qcli_high = 0; | | |
| | | |
| int chk_qcli_mode( void ) { | | |
| unsigned char DS80A = sbb( DS80A_Address ); | | |
| unsigned short QCLIS = (DS80A >> 1) & 1; | | |
| if ( QCLIS ) { | | |
| nl_error( 1, "Cannot change modes while QCLI is on" ); | | |
| return 0; | | |
| } else return 1; | | |
| } | | |
| /* is_icos must be 0 or 1. If it's neither, this will | | |
| timeout. */ | | |
| static int set_qcli_mode( int is_icos ) { | | |
| if ( chk_qcli_mode() ) { | | |
| int i; | | |
| for ( i = 0; i < 8; i++ ) { | | |
| unsigned char DS80A = sbb( DS80A_Address ); | | |
| unsigned short ORIRS = ((DS80A>>2) & 1) ^ 1; | | |
| if ( is_icos == ORIRS ) { | | |
| if ( i > 4 ) { | | |
| nl_error( 1, "Required %d tries to switch to %s", | | |
| is_icos ? "ICOS" : "Ringdown" ); | | |
| } | | |
| return 1; | | |
| } | | |
| scdc( is_icos ? 5 : 4 ); | | |
| /* delay(10); */ | | |
| } | | |
| nl_error( 2, "Unable to command qcli mode to %s", | | |
| is_icos ? "ICOS" : "Ringdown" ); | | |
| } | | |
| return 0; | | |
| } | | |
| | | |
| static int write_dtoa( unsigned short addr, unsigned short value ) { | | |
| unsigned short oldval = sbw( addr ); | | |
| int i; | | |
| | | |
| if ( oldval == value ) { | | |
| if ( ! write_dtoa( addr, value ^ 1 ) ) | | |
| return 0; | | |
| oldval = value ^ 1; | | |
| } | | |
| for ( i = 0; i < 4; i++ ) { | | |
| sbwr( addr, value ); | | |
| oldval = sbw( addr ); | | |
| if ( oldval == value ) { | | |
| if ( i > 0 ) | | |
| nl_error( 1, "Required %d attempts to update dtoa", | | |
| i+1 ); | | |
| return 1; | | |
| } | | |
| delay(10); | | |
| } | | |
| nl_error( 2, "Could not write dtoa value %04X", value ); | | |
| return 0; | | |
| } | | |
| | | |
| /* returns 1 if set successfully, 0 if chk_qcli_mode | | |
| complains */ | | |
| static int set_qcli_dtoa( int is_ramp, unsigned short value ) { | | |
| if ( set_qcli_mode( is_ramp ) ) { | | |
| write_dtoa( 0xCF0, value ); | | |
| return set_qcli_mode( qcli_icos ); | | |
| } else return 0; | | |
| } | | |
| | | |
| static int set_qcli_offset( unsigned short value ) { | | |
| if ( set_qcli_dtoa( 0, value ) ) { | | |
| qcli_offset = value; | | |
| cache_write( OffSt_Address, qcli_offset ); | | |
| return 1; | | |
| } else return 0; | | |
| } | | |
| | | |
| static int set_qcli_ramp( unsigned short value ) { | | |
| if ( set_qcli_dtoa( 1, value ) ) { | | |
| qcli_ramp = value; | | |
| cache_write( RampSt_Address, qcli_ramp ); | | |
| return 1; | | |
| } else return 0; | | |
| } | | |
| | | |
| static int set_qcli_hilo( unsigned short hi, unsigned short lo ) { | | |
| if ( chk_qcli_mode() ) { | | |
| if ( lo > hi ) { | | |
| nl_error( 1, "lo > hi: using lower value" ); | | |
| lo = hi; | | |
| } | | |
| qcli_low = lo; | | |
| cache_write( QCLILo_Address, qcli_low ); | | |
| qcli_high = hi; | | |
| cache_write( QCLIHi_Address, qcli_high ); | | |
| return 1; | | |
| } else return 0; | | |
| } | | |
| static void calculate_hilo( void ) { | | |
| unsigned short hi, lo, rise; | | |
| lo = (652L * qcli_offset)/10000; | | |
| rise = (35L*qcli_ramp)/1000; | | |
| if ( qcli_10Hz == 0 ) rise /= 5; | | |
| hi = lo + rise; | | |
| set_qcli_hilo( hi, lo ); | | |
| } | | |
| static void calculate_ro( void ) { | | |
| unsigned short ramp, offset; | | |
| unsigned short rise; | | |
| offset = ( qcli_low * 10000L ) / 652; | | |
| rise = qcli_high - qcli_low; | | |
| ramp = ( rise * 1000L ) / 35; | | |
| if ( qcli_10Hz == 0 ) ramp *= 5; | | |
| set_qcli_offset( offset ); | | |
| set_qcli_ramp( ramp ); | | |
| } | | |
| #endif | | #endif |
| %} | | %} |
| | | |
| &command | | &command |
| : QCLI ICOS * { if ( set_qcli_mode( 1 ) ) qcli_icos = 1; } | | : CPCI Start * { |
| : QCLI Ringdown * { if ( set_qcli_mode( 0 ) ) qcli_icos = 0; } | | if ( cpci14setups.FSample != 0 ) |
| : QCLI Offset %d * { | | cpci_setup( cpci14, &cpci14setups ); |
| if ( set_qcli_offset( $3 ) ) | | else msg(1,"CPCI Not Acquiring" ); |
| calculate_hilo(); | | } |
| } | | : CPCI Set All %ld (Sample Rate) %ld (n Sample) |
| : QCLI Ramp %d * { | | %ld (n Report) %d (n Coadd) %d (Rep Rate) * { |
| if ( set_qcli_ramp( $3 ) ) | | int count; |
| calculate_hilo(); | | long int FSample; |
| } | | count = floor(1/($4 * 25e-9) + .5); |
| : QCLI Waveform From %d (Ramp Starting Current in mA) to %d | | FSample = floor(1/(count*25e-9) + .5); |
| (Ramp Ending Current in mA) mA * { | | if ( FSample != $4 ) |
| if ( set_qcli_hilo( $6, $4 ) ) | | nl_error( 1, "Actual Sample rate will be %ld", FSample ); |
| calculate_ro(); | | cpci14setups.FSample = FSample; |
| } | | cpci14setups.NSample = $5; |
| : QCLI Waveform Reset * { | | cpci14setups.NReport = $6; |
| if ( chk_qcli_mode() ) calculate_ro(); | | cpci14setups.NCoadd = $7; |
| } | | cpci14setups.FTrigger = $8; |
| | | } |
| | | : CPCI Stop * { cpci_stop( cpci14 ); } |
| | | : CPCI Quit * { cpci_quit( cpci14 ); } |
| | | : QCLI &qclicommand * |
| ; | | ; |
| &scdc_cmd | | |
| : QCLI &on_off * { $0 = 3 - $2; } | | &qclicommand |
| : QCLI Rate &qcli_rate * { | | : Select Waveform &QCLI_Wave * { |
| if ( chk_qcli_mode() ) { | | cpci14setups = QCLI_Waves[$3]; |
| $0 = $3; | | qcli_select( $3 ); |
| qcli_10Hz = ($0 == 13); | | } |
| calculate_ro(); | | : Run * { qcli_run(); } |
| } else CANCEL_LINE; | | : Stop * { qcli_stop(); } |
| } | | : Clear Errors * { qcli_clear(); } |
| : QCLI Debug &QCLIdbg * { scdc( $3 ); } | | : Write &DAC_Val to &DAC_Num * { |
| | | qcli_set_dac( $4, $2 ); |
| | | } |
| | | : Set Ton to &QCLI_T_val * { qcli_set_ton( $4 ); } |
| | | : Set Toff to &QCLI_T_val * { qcli_set_toff( $4 ); } |
| | | : Set Tpre to &QCLI_T_val * { qcli_set_tpre( $4 ); } |
| ; | | ; |
| &qcli_rate <int> | | &DAC_Val <short> |
| : 50Hz { $0 = 12; } | | : %d (Enter digital value) { $0 = $1; } |
| : 10Hz { $0 = 13; } | | |
| ; | | ; |
| &on_off <int> | | &DAC_Num <short> |
| : On { $0 = 1; } | | : DAC0 { $0 = 0; } |
| : Off { $0 = 0; } | | : Ramp DAC { $0 = 1; } |
| ; | | ; |
| &QCLIdbg <int> | | &QCLI_T_val <unsigned short> |
| : On { $0 = 2; } | | : %d (Enter time in usecs) { $0 = $1; } |
| : Off { $0 = 3; } | | |
| : ICOS { $0 = 4; } | | |
| : RingDown { $0 = 5; } | | |
| : 50Hz { $0 = 12; } | | |
| : 10Hz { $0 = 13; } | | |
| ; | | ; |