version 1.6 | | version 1.7 |
---|
| | |
%{ | | %{ |
#ifdef SERVER | | #ifdef SERVER |
| | #include <i86.h> |
#include "address.h" | | #include "address.h" |
#include "da_cache.h" | | #include "da_cache.h" |
#include "subbus.h" | | #include "subbus.h" |
| | |
#endif | | #endif |
} | | } |
| | |
static int qcli_mode = 0, qcli_on = 0, qcli_icos = 0; | | /* static int qcli_mode = 0, qcli_on = 0; */ |
| | static int qcli_icos = 0; |
static int qcli_10Hz = 0; | | static int qcli_10Hz = 0; |
static unsigned short qcli_ramp = 0, qcli_offset = 0; | | static unsigned short qcli_ramp = 0, qcli_offset = 0; |
static unsigned short qcli_low = 0, qcli_high = 0; | | static unsigned short qcli_low = 0, qcli_high = 0; |
| | |
int chk_qcli_mode( void ) { | | int chk_qcli_mode( void ) { |
if ( qcli_on ) { | | unsigned char DS80A = sbb( DS80A_Address ); |
| | unsigned short QCLIS = (DS80A >> 1) & 1; |
| | if ( QCLIS ) { |
nl_error( 1, "Cannot change modes while QCLI is on" ); | | nl_error( 1, "Cannot change modes while QCLI is on" ); |
return 0; | | return 0; |
} else return 1; | | } else return 1; |
} | | } |
static void set_qcli_mode( int mode, int is_icos ) { | | /* is_icos must be 0 or 1. If it's neither, this will |
| | timeout. */ |
| | static int set_qcli_mode( int is_icos ) { |
if ( chk_qcli_mode() ) { | | if ( chk_qcli_mode() ) { |
scdc( mode ); | | int i; |
qcli_mode = mode; | | for ( i = 0; i < 8; i++ ) { |
qcli_icos = is_icos; | | unsigned char DS80A = sbb( DS80A_Address ); |
| | unsigned short ORIRS = ((DS80A>>2) & 1) ^ 1; |
| | if ( is_icos == ORIRS ) { |
| | if ( i > 4 ) { |
| | nl_error( 1, "Required %d tries to switch to %s", |
| | is_icos ? "ICOS" : "Ringdown" ); |
} | | } |
| | return 1; |
} | | } |
/* returns 1 if set successfully, 0 if chk_qcli_mode | | scdc( is_icos ? 5 : 4 ); |
complains */ | | /* delay(10); */ |
static int set_qcli_dtoa( int select, unsigned short value ) { | | } |
if ( chk_qcli_mode() ) { | | nl_error( 2, "Unable to command qcli mode to %s", |
scdc( select ); /* Make sure we're in select state */ | | is_icos ? "ICOS" : "Ringdown" ); |
if ( select != qcli_mode ) { | | } |
scdc( select ); | | return 0; |
/* sending twice guarantees command has been issued. | | } |
scdc Replies before forwarding command to dccc, | | |
but it won't Receive again until the command has | | static int write_dtoa( unsigned short addr, unsigned short value ) { |
gone through. */ | | unsigned short oldval = sbw( addr ); |
} | | int i; |
sbwr( 0xCF0, value ); | | |
if ( select != qcli_mode ) { | | if ( oldval == value ) { |
if ( qcli_mode ) { | | if ( ! write_dtoa( addr, value ^ 1 ) ) |
scdc( qcli_mode ); | | return 0; |
nl_error( 0, "Sent scdc(%d)", qcli_mode ); | | oldval = value ^ 1; |
} else qcli_mode = select; | | |
} | | } |
| | for ( i = 0; i < 4; i++ ) { |
| | sbwr( addr, value ); |
| | oldval = sbw( addr ); |
| | if ( oldval == value ) { |
| | if ( i > 0 ) |
| | nl_error( 1, "Required %d attempts to update dtoa", |
| | i+1 ); |
return 1; | | return 1; |
} | | } |
| | delay(10); |
| | } |
| | nl_error( 2, "Could not write dtoa value %04X", value ); |
return 0; | | return 0; |
} | | } |
| | |
| | /* returns 1 if set successfully, 0 if chk_qcli_mode |
| | complains */ |
| | static int set_qcli_dtoa( int is_ramp, unsigned short value ) { |
| | if ( set_qcli_mode( is_ramp ) ) { |
| | write_dtoa( 0xCF0, value ); |
| | return set_qcli_mode( qcli_icos ); |
| | } else return 0; |
| | } |
| | |
static int set_qcli_offset( unsigned short value ) { | | static int set_qcli_offset( unsigned short value ) { |
nl_error( 0, "before set_qcli_dtoa(4) qcli_mode is %d", | | if ( set_qcli_dtoa( 0, value ) ) { |
qcli_mode ); | | |
if ( set_qcli_dtoa( 4, value ) ) { | | |
nl_error( 0, "after set_qcli_dtoa(4) qcli_mode is %d", qcli_mode ); | | |
qcli_offset = value; | | qcli_offset = value; |
cache_write( OffSt_Address, qcli_offset ); | | cache_write( OffSt_Address, qcli_offset ); |
return 1; | | return 1; |
} else return 0; | | } else return 0; |
} | | } |
| | |
static int set_qcli_ramp( unsigned short value ) { | | static int set_qcli_ramp( unsigned short value ) { |
if ( set_qcli_dtoa( 5, value ) ) { | | if ( set_qcli_dtoa( 1, value ) ) { |
qcli_ramp = value; | | qcli_ramp = value; |
cache_write( RampSt_Address, qcli_ramp ); | | cache_write( RampSt_Address, qcli_ramp ); |
return 1; | | return 1; |
} else return 0; | | } else return 0; |
} | | } |
| | |
static int set_qcli_hilo( unsigned short hi, unsigned short lo ) { | | static int set_qcli_hilo( unsigned short hi, unsigned short lo ) { |
if ( chk_qcli_mode() ) { | | if ( chk_qcli_mode() ) { |
if ( lo > hi ) { | | if ( lo > hi ) { |
| | |
#endif | | #endif |
%} | | %} |
&command | | &command |
: QCLI ICOS * { set_qcli_mode( 5, 1 ); } | | : QCLI ICOS * { if ( set_qcli_mode( 1 ) ) qcli_icos = 1; } |
: QCLI Ringdown * { set_qcli_mode( 4, 0 ); } | | : QCLI Ringdown * { if ( set_qcli_mode( 0 ) ) qcli_icos = 0; } |
: QCLI Offset %d * { | | : QCLI Offset %d * { |
if ( set_qcli_offset( $3 ) ) | | if ( set_qcli_offset( $3 ) ) |
calculate_hilo(); | | calculate_hilo(); |
| | |
if ( set_qcli_ramp( $3 ) ) | | if ( set_qcli_ramp( $3 ) ) |
calculate_hilo(); | | calculate_hilo(); |
} | | } |
: QCLI Test ICOS * { scdc(4); scdc(4); sbwr(0xCF0,5000); scdc(5); qcli_mode = 5; } | | |
: QCLI Test Ringdown * { scdc(5); scdc(5); sbwr(0xCF0,5000); scdc(4); qcli_mode = 4; } | | |
: QCLI Waveform From %d (Ramp Starting Current in mA) to %d | | : QCLI Waveform From %d (Ramp Starting Current in mA) to %d |
(Ramp Ending Current in mA) mA * { | | (Ramp Ending Current in mA) mA * { |
if ( set_qcli_hilo( $6, $4 ) ) | | if ( set_qcli_hilo( $6, $4 ) ) |
calculate_ro(); | | calculate_ro(); |
} | | } |
| | : QCLI Waveform Reset * { |
| | if ( chk_qcli_mode() ) calculate_ro(); |
| | } |
; | | ; |
&scdc_cmd | | &scdc_cmd |
: QCLI &on_off * { | | : QCLI &on_off * { $0 = 3 - $2; } |
qcli_on = $2; | | |
$0 = 3 - $2; | | |
} | | |
: QCLI Rate &qcli_rate * { | | : QCLI Rate &qcli_rate * { |
if ( chk_qcli_mode() ) { | | if ( chk_qcli_mode() ) { |
$0 = $3; | | $0 = $3; |