System Controller Connector Definition Rev. 4
Contents
- 1.0: Pin Definitions
- 2.0: Compatibility Issues
- 3.0: Revision History
1 ADDR0\ 23 DATA2\ 45 DIGGND
2 ADDR1\ 24 DATA3\ 46 EXPRD\
3 ADDR2\ 25 DATA4\ 47 DIGGND
4 ADDR3\ 26 DATA5\ 48 EXPWR\
5 ADDR4\ 27 DATA6\ 49 DIGGND
6 ADDR5\ 28 DATA7\ 50 CMDSTRB\
7 ADDR6\ 29 DATA8\ 51 DIGGND
8 ADDR7\ 30 DATA9\ 52 CMDENBL\
9 ADDR8\ 31 DATAA\ 53 DIGGND
10 ADDR9\ 32 DATAB\ 54 EXPINTR\
11 ADDRA\ 33 DATAC\ 55 DIGGND
12 ADDRB\ 34 DATAD\ 56 EXPACK\
13 ADDRC\ 35 DATAE\ 57 AG or DIGGND
14 ADDRD\ 36 DATAF\ 58 +15V or DIGGND
15 ADDRE\ 37 EXPEN0\ or DIGGND 59 -15V
16 ADDRF\ 38 EXPEN1\ or DIGGND 60 TERMPWR
17 +5V.ICC 39 EXPEN2\ or DIGGND 61 +5V.ICC
18 +5V.ICC 40 EXPEN3\ or DIGGND 62 +5V.ICC
19 +28V.RTN 41 EXPEN4\ or DIGGND 63 +5V.ICC
20 +28V. 42 EXPEN5\ or DIGGND 64 +5V.ICC
21 DATA0\ 43 EXPEN6\ or DIGGND
22 DATA1\ 44 +28V.BATT or DIGGND
1.1: Notes
Signal names ending in a backslash (\) are "true-in-low" on the
cable meaning a logic 1 is represented by zero volts.
Pins identified as "or DIGGND" should be jumper-selectable to
DIGGND on the system controller. If their primary function is
not provided in a particular
system configuration, the line can be jumpered to ground in order
to prevent and open line on the cable. If the primary function is
to provide power, the line should be jumpered with a 1-amp fuse
to avoid shorting the power line to ground accidentally.
- ADDR0\ - ADDRF\:
- These lines define the current address. They are true-in-low.
Historically, only the 12 low-order lines are significant, so
while the high-order lines can be controlled, they cannot be
counted on to provide additional addresses. On existing systems,
ADDRC\
through
ADDRF\
have been jumper-selectable to
DIGGND.
- DATA0\ - DATAF\:
- This is the ICC Data Bus. The lines are bi-directional and true-in-low.
When EXPWR\ is asserted, these lines are driven by the System
Controller. When EXPRD\
is asserted, they may be driven by the board currently being addressed.
- +5V.ICC
- is used on the system controller only to enable the address and
data buffers. It must be distinguished from the +5V provided by
the PC, although the two should be electrically identical.
- EXPEN0\ - EXPEN6\:
- These signals are not defined on the cable and are reserved for
future use. They should be jumper selectable to
DIGGND.
- +28V.BATT:
- This pin provides power which is present at times when the
computer is otherwise unpowered. It can be used by communications
modules to control the turn-on and turn-off of the computer
itself. If such power is not present in a system configuration,
this signal should be jumpered to DIGGND
on the System Controller using a 1-amp fuse.
- +28V. - +28V.RTN:
- These were previously considered optional, but in this revision are
considered mandatory. They are used on the System Controller to
monitor system power and provide an early warning in the event of
power failure. If system power is derived from some other source,
it should be scaled appropriately and provided here. Under current
designs, this line is not intended to supply power to any circuits.
- EXPRD\:
- When this line is asserted (zero volts), a read cycle is initiated.
The address lines are stable, and an attached board matching the
address may drive data onto the data lines and assert the
EXPACK\ signal.
- EXPRD\:
- When this line is asserted (zero volts), a write cycle is initiated.
The address and data lines are stable, and an attached board (or boards)
matching the address may read data from the data lines and assert the
EXPACK\ signal.
- CMDSTRB\:
- This is the global command strobe signal. It is generated on the
System Controller and may be routed through digital I/O boards to
the system distribution panel. As a rule, all digital commands are
qualified with this signal.
- CMDENBL\:
- This is the global Command Enable signal. It is generated on the
System Controller and can only be asserted while the watchdog
timer is active, indicating that the data acquisition and control
software is functioning properly. As a rule, all digital commands
are qualified with this signal so no commands can be asserted if
the controlling software is malfunctioning or if the computer has
not booted successfully.
- EXPINTR\:
- This is the global interrupt line for servicing interrupts from
the interface boards. The signal is active low and is pulled up
on the System Controller. Attached boards should drive this line
with an open-collector output or by controlling the enable on a
tri-state gate so that the line is never driven high but only
pulled low. Under current usage, determining the nature of the
interrupt requires additional hardware downstream from the System
Controller, specifically the Timer Board, which contains 8259
interrupt controllers. A new architecture has been proposed to
allow for a parallel poll of boards which would make support for
multiple interrupts possible without a Timer Board.
- EXPACK\:
- This signal is an acknowledge from an attached board indicating
that a read or write transfer has been successful. The signal is
active low and is pulled up on the System Controller. Attached
boards should drive this line with an open-collector output or by
controlling the enable on a tri-state gate so that the line is
never driven high but only pulled low. This line should be
asserted by a board when its address is present on the address
lines and EXPRD\ or EXPWR\ is asserted.
- TERMPWR:
- This line is to provide power for terminating resistor networks
on the cable or backplane.
2.0: Compatibility Issues
Care has been taken to guarantee that this revision of the Subbus
cable definition remains compatible with previous revisions, and
care was taken with previous revisions to ensure that future
revisions would be possible. There are however specific issues
which must be attended to when interfacing to components designed
to the early revision standards.
+5V.ICC:
Existing practice has been to jumper pins 17 and 18 to
DIGGND
except during rudimentary checkout procedures. With this
revision, these lines must carry +5 volts or the buffers on the
System Controller will not be enabled. An existing ICC should
have these lines rejumpered to +5V using a 1-amp fuse just in
case you forget to jumper back to
DIGGND
before reconnecting to a System Controller from an older
revision.
+28V.BATT is on a pin previously designated EXPEN7\.
This is jumpered to DIGGND
on most existing ICCs. The jumper should be removed if
battery power is present.
ADDRC\ - ADDRF\:
In earlier revisions, these lines could be jumpered to
DIGGND.
You should verify that they are not jumpered to ground before
connecting.
3.0: Revision History
I have unilaterally assigned the revision number 4 to this
specification. This is based on the following cursory history:
- Rev. 1:
- The original subbus cable definition grew out of the SC-1
Expansion Chassis cable, defined by Southwest Research Institute.
That cable had a 37-pin Cannon-D connector. The first extension
to and ICC was via a card in the SC-1 Expansion Chassis cabled to
the ICC Buffer Card in the ICC. Subsequently, the PC/ICC card was
developed to drive the same 37-pin cable from an IBM PC.
- Rev. 2:
- As our skill in designing printed circuit boards developed, we
endevoured to integrate more functionality onto the System
Controller. With an eye toward functional expansion, we also
expanded the number of wires on the interface cable to 56. This cable
definition was supported by a new 16-bit System Controller and a
new ICC Backplane definition. The new configuration suffered from
a serious cross-talk problem due to careless placement of data
lines adjacent to critical control lines on the cable.
- Rev. 3:
- The sole purpose of this redefinition was to alleviate the
cross-talk problems by carefully isolating each control signal
with interspersed ground lines. This revision was also supported
by a new revision of the System Controller and a new revision of
the ICC Backplane.
- Rev. 4:
- The primary motivation for this latest revision is to support
increasing miniaturization of our instrument support electronics.
The ultimate plane is to elminate the ICC Backplane entirely and
migrate boards directly onto the subbus cable, reborn as a
stackplane along the lines of the PC-104 standard. The connector
has again been expanded, this time to 64 pins in order to allow
for a power bus.
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